419 lines
18 KiB
C
419 lines
18 KiB
C
/***********************************************************************************************************************
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* FILE DESCRIPTION
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* ------------------------------------------------------------------------------------------------------------------*/
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/** \file
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* \brief RAM driver functions
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*
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* --------------------------------------------------------------------------------------------------------------------
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* COPYRIGHT
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* --------------------------------------------------------------------------------------------------------------------
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* \par Copyright
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* \verbatim
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* Copyright (c) 2022 by Vector Informatik GmbH. All rights reserved.
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*
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* This software is copyright protected and proprietary to Vector Informatik GmbH.
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* Vector Informatik GmbH grants to you only those rights as set out in the license conditions.
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* All other rights remain with Vector Informatik GmbH.
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* \endverbatim
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*/
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/**********************************************************************************************************************/
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/***********************************************************************************************************************
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* REVISION HISTORY
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* --------------------------------------------------------------------------------------------------------------------
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* Version Date Author Change Id Description
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* --------------------------------------------------------------------------------------------------------------------
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* 01.00.00 2013-10-23 visjhg - Initial release
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* 01.01.00 2015-11-27 visase ESCAN00086297 Allow to override the RAM buffer base address via configuration
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* 01.02.00 2016-06-17 visci ESCAN00090364 Added support for flashCode use case
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* 01.02.01 2018-03-22 visdkl ESCAN00098872 No changes
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* 01.02.02 2021-03-08 vishor ESCAN00108134 Added/adapted MemMap sections
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* 01.03.00 2022-03-17 visstn FBL-4366 Perform MISRA 2012 migration
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**********************************************************************************************************************/
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#define FBL_RAMIO_SOURCE
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/***********************************************************************************************************************
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* INCLUDES
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**********************************************************************************************************************/
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#include "fbl_ramio_inc.h"
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/***********************************************************************************************************************
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* VERSION
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**********************************************************************************************************************/
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#if ( FBLWRAPPERFLASH_XRAMHIS_VERSION != 0x0103u ) || \
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( FBLWRAPPERFLASH_XRAMHIS_RELEASE_VERSION != 0x00u )
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# error "Error in FBL_RAMIO.C: Source and header file are inconsistent!"
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#endif
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/***********************************************************************************************************************
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* CONFIGURATION CHECKS
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**********************************************************************************************************************/
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/* Check if buffer size is correctly defined */
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#if defined( RAM_DRV_BUFFER_SIZE ) && ( RAM_DRV_BUFFER_SIZE > 0u )
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#else
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# error "Error in FBL_RAMIO.C: Missing or wrong configuration of RAM_DRV_BUFFER_SIZE."
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#endif
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/* Check if segment size and buffer size match each other */
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#if defined( RAM_DRV_SEGMENT_SIZE )
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# if ( RAM_DRV_SEGMENT_SIZE > 1u )
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# if ( 0u != (RAM_DRV_BUFFER_SIZE & (RAM_DRV_SEGMENT_SIZE - 1u)) )
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# error "Error in FBL_RAMIO.C: Inconsistent configuration of RAM_DRV_SEGMENT_SIZE and RAM_DRV_BUFFER_SIZE."
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# endif
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# endif
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#endif
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/* Check if segment size has reasonable / supported value */
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#if defined( RAM_DRV_SEGMENT_SIZE )
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# if ( RAM_DRV_SEGMENT_SIZE == 1u ) || ( RAM_DRV_SEGMENT_SIZE == 2u ) || ( RAM_DRV_SEGMENT_SIZE == 4u )
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# else
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# error "Error in FBL_RAMIO.C: Wrong configuration of RAM_DRV_SEGMENT_SIZE."
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# endif
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#endif
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#if defined( RAM_DRV_SEGMENT_SIZE ) && \
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defined( RAM_DRV_BASE_ADDRESS_OVERRIDE )
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/* Check alignment of base address */
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# if ( 0u != (RAM_DRV_BASE_ADDRESS_OVERRIDE & (RAM_DRV_SEGMENT_SIZE - 1u)) )
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# error "Error in FBL_RAMIO.C: Inconsistent configuration of RAM_DRV_SEGMENT_SIZE and RAM_DRV_BASE_ADDRESS_OVERRIDE."
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# endif
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#endif
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#if defined( RAM_DRV_POLLING_INTERVAL )
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# if ( 0u == RAM_DRV_POLLING_INTERVAL ) || \
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( 0u != (RAM_DRV_POLLING_INTERVAL & (RAM_DRV_POLLING_INTERVAL - 1u)) )
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# error "Error in FBL_RAMIO.C: Wrong configuration of RAM_DRV_POLLING_INTERVAL (shall be 2^n)."
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# endif
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#endif
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/***********************************************************************************************************************
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* DEFINES
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**********************************************************************************************************************/
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#if defined( RAM_DRV_EXT_BUFFER )
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# define RAM_DRV_BUFFER RAM_DRV_EXT_BUFFER
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#else
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# define RAM_DRV_BUFFER g_RamData
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#endif
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#if defined( RAM_DRV_BASE_ADDRESS_OVERRIDE )
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/** Allow to override the base address via fbl_ramio_cfg.h, e.g. if RAM_DRV_BUFFER shall be located at an arbitrary address */
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# define RAM_DRV_BASE_ADDRESS RAM_DRV_BASE_ADDRESS_OVERRIDE
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#else
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/** Base address of accessible RAM area */
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# define RAM_DRV_BASE_ADDRESS ((IO_PositionType)RAM_DRV_BUFFER)
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#endif
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/***********************************************************************************************************************
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* GLOBAL DATA
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**********************************************************************************************************************/
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#if defined( RAM_DRV_EXT_BUFFER )
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#else
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# define FBLRAMIO_START_SEC_VAR
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# include "MemMap.h" /* PRQA S 5087 */ /* MD_MSR_MemMap */
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/** Global data buffer that can be accessed via RamDriver interface */
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V_MEMRAM0 static V_MEMRAM1 IO_U8 V_MEMRAM2 g_RamData[RAM_DRV_BUFFER_SIZE];
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# define FBLRAMIO_STOP_SEC_VAR
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# include "MemMap.h" /* PRQA S 5087 */ /* MD_MSR_MemMap */
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#endif /* RAM_DRV_EXT_BUFFER */
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#define FBLRAMIO_START_SEC_CODE
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#include "MemMap.h" /* PRQA S 5087 */ /* MD_MSR_MemMap */
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/***********************************************************************************************************************
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* LOCAL FUNCTION PROTOTYPES
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**********************************************************************************************************************/
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static IO_ErrorType V_API_NEAR RamDriver_GetOffset( IO_SizeType length, IO_PositionType address,
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V_MEMRAM1 IO_SizeType V_MEMRAM2 V_MEMRAM3 * pOffset );
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/***********************************************************************************************************************
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* LOCAL FUNCTIONS
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* RamDriver_GetOffset
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**********************************************************************************************************************/
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/*! \brief Get the local buffer offset
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* \param[in] length The number of bytes to be modified
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* \param[in] address The start address
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* \param[out] offset The returned offset
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* \return IO_E_OK if succeeded, IO_E_NOT_OK otherwise
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**********************************************************************************************************************/
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static IO_ErrorType V_API_NEAR RamDriver_GetOffset( IO_SizeType length, IO_PositionType address,
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V_MEMRAM1 IO_SizeType V_MEMRAM2 V_MEMRAM3 * pOffset )
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{
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IO_ErrorType result;
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IO_SizeType offset;
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result = IO_E_NOT_OK;
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/* Avoid compiler warning (comparison against 0 always true) */
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#if defined( RAM_DRV_BASE_ADDRESS_OVERRIDE )
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# if ( 0u != RAM_DRV_BASE_ADDRESS )
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if (address >= RAM_DRV_BASE_ADDRESS) /* PRQA S 0306 */ /* MD_FblRamio_0306 */
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# endif
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#endif
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{
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offset = address - RAM_DRV_BASE_ADDRESS; /* PRQA S 0306 */ /* MD_FblRamio_0306 */
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if ( (length <= RAM_DRV_BUFFER_SIZE)
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&& (offset <= (RAM_DRV_BUFFER_SIZE - length)) )
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{
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*pOffset = offset;
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result = IO_E_OK;
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}
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}
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return result;
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}
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/***********************************************************************************************************************
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* GLOBAL FUNCTIONS
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* RamDriver_InitSync
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**********************************************************************************************************************/
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/*! \brief Initialize the RAM algorithm
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* \param[in] address Unused parameter for HIS interface compliance
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* \return The return code shows the success of the initialization
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**********************************************************************************************************************/
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/* PRQA S 3673 1 */ /* MD_MSR_Rule8.13 */
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IO_ErrorType V_API_NEAR RamDriver_InitSync( void * address )
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{
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IO_ErrorType result;
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#if defined( RAM_DRV_ENABLE_MEM_INIT )
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IO_U32 i;
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#endif
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#if defined( V_ENABLE_USE_DUMMY_STATEMENT )
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(void)address;
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#endif
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result = IO_E_OK;
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#if defined( RAM_DRV_BASE_ADDRESS_OVERRIDE )
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/* Alignment check executed by preprocessor (see configuration checks section) */
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#else
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/* PRQA S 2992, 2996, 0306 1 */ /* MD_FblRamio_2992_2996, MD_FblRamio_2992_2996, MD_FblRamio_0306 */
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if (0u != (RAM_DRV_BASE_ADDRESS & (RAM_DRV_SEGMENT_SIZE - 1u)))
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{
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/* RAM buffer is not aligned with configured segment size */
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result = IO_E_NOT_OK;
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}
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#endif /* RAM_DRV_BASE_ADDRESS_OVERRIDE */
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#if defined( RAM_DRV_ENABLE_MEM_INIT )
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if (IO_E_OK == result) /* PRQA S 2991, 2995 */ /* MD_FblRamio_2991_2995 */
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{
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for (i = 0u; i < (RAM_DRV_BUFFER_SIZE / RAM_DRV_SEGMENT_SIZE); i++)
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{
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# if ( RAM_DRV_SEGMENT_SIZE == 1u )
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((IO_U8 *)RAM_DRV_BUFFER)[i] = 0u;
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# elif ( RAM_DRV_SEGMENT_SIZE == 2u )
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((IO_U16 *)RAM_DRV_BUFFER)[i] = 0u; /* PRQA S 0310, 3305 */ /* MD_FblRamio_0310_3305 */
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# elif ( RAM_DRV_SEGMENT_SIZE == 4u )
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((IO_U32 *)RAM_DRV_BUFFER)[i] = 0u; /* PRQA S 0310, 3305 */ /* MD_FblRamio_0310_3305 */
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# endif
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# if defined( RAM_DRV_POLLING_INTERVAL )
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/* PRQA S 2985, 2991, 2995 1 */ /* MD_FblRamio_2985, MD_FblRamio_2991_2995, MD_FblRamio_2991_2995 */
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if (0u == (i & (RAM_DRV_POLLING_INTERVAL - 1u)))
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{
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RAM_DRV_POLLING_FUNCTION();
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}
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# endif /* RAM_DRV_POLLING_INTERVAL */
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}
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}
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#endif /* RAM_DRV_ENABLE_MEM_INIT */
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return result;
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}
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/***********************************************************************************************************************
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* RamDriver_DeinitSync
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**********************************************************************************************************************/
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/*! \brief Deinitialize the RAM algorithm
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* \param[in] address Unused parameter for HIS interface compliance
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* \return The return code shows the success of the deinitialization
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**********************************************************************************************************************/
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IO_ErrorType V_API_NEAR RamDriver_DeinitSync( void * address )
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{
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IO_ErrorType result;
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/* Clean-up memory */
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result = RamDriver_InitSync(address);
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return result;
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}
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/***********************************************************************************************************************
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* RamDriver_RWriteSync
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**********************************************************************************************************************/
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/*! \brief Program RAM memory
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* \param[in] writeBuffer Write data buffer
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* \param[in] writeLength Number of bytes to be written
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* \param[in] writeAddress The write address
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* \return Status of RAM programming
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**********************************************************************************************************************/
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/* PRQA S 3673 1 */ /* MD_MSR_Rule8.13 */
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IO_ErrorType V_API_NEAR RamDriver_RWriteSync( IO_MemPtrType writeBuffer, IO_SizeType writeLength, IO_PositionType writeAddress )
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{
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IO_ErrorType result;
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IO_SizeType offset;
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IO_SizeType i;
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result = RamDriver_GetOffset(writeLength, writeAddress, &offset);
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if (IO_E_OK == result)
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{
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for (i = 0u; i < writeLength; i++)
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{
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#if defined( RAM_DRV_POLLING_INTERVAL )
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/* PRQA S 2985, 2991, 2995 1 */ /* MD_FblRamio_2985, MD_FblRamio_2991_2995, MD_FblRamio_2991_2995 */
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if (0u == (i & (RAM_DRV_POLLING_INTERVAL - 1u)))
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{
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RAM_DRV_POLLING_FUNCTION();
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}
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#endif /* RAM_DRV_POLLING_INTERVAL */
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RAM_DRV_BUFFER[offset] = writeBuffer[i];
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offset++;
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}
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}
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return result;
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}
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/***********************************************************************************************************************
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* RamDriver_REraseSync
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**********************************************************************************************************************/
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/*! \brief Erase RAM memory
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* \pre RAM driver has to be initialized
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* \param[in] eraseLength Number of bytes to be erased
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* \param[in] eraseAddress The erase address
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* \return Status of RAM erase
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**********************************************************************************************************************/
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IO_ErrorType V_API_NEAR RamDriver_REraseSync( IO_SizeType eraseLength, IO_PositionType eraseAddress )
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{
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#if defined( RAM_DRV_DELETED )
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IO_ErrorType result;
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IO_SizeType offset;
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IO_SizeType i;
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result = RamDriver_GetOffset(eraseLength, eraseAddress, &offset);
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if (IO_E_OK == result)
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{
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for (i = 0u; i < eraseLength; i++)
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{
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# if defined( RAM_DRV_POLLING_INTERVAL )
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/* PRQA S 2985, 2991, 2995 1 */ /* MD_FblRamio_2985, MD_FblRamio_2991_2995, MD_FblRamio_2991_2995 */
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if (0u == (i & (RAM_DRV_POLLING_INTERVAL - 1u)))
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{
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RAM_DRV_POLLING_FUNCTION();
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}
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# endif /* RAM_DRV_POLLING_INTERVAL */
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RAM_DRV_BUFFER[offset] = RAM_DRV_DELETED;
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offset++;
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}
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}
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return result;
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#else /* ! RAM_DRV_DELETED */
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# if defined( V_ENABLE_USE_DUMMY_STATEMENT )
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(void)eraseLength;
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(void)eraseAddress;
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# endif /* V_ENABLE_USE_DUMMY_STATEMENT */
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return IO_E_OK;
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#endif /* ! RAM_DRV_DELETED */
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}
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/***********************************************************************************************************************
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* RamDriver_RReadSync
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**********************************************************************************************************************/
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/*! \brief Read RAM memory
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* \pre RAM driver has to be initialized
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* \param[out] readBuffer Read data buffer
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* \param[in] readLength Number of bytes to be read
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* \param[in] readAddress The read address
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* \return Status of RAM read
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**********************************************************************************************************************/
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IO_ErrorType V_API_NEAR RamDriver_RReadSync( IO_MemPtrType readBuffer, IO_SizeType readLength, IO_PositionType readAddress )
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{
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IO_ErrorType result;
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IO_SizeType offset;
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IO_SizeType i;
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result = RamDriver_GetOffset(readLength, readAddress, &offset);
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if (IO_E_OK == result)
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{
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for (i = 0u; i < readLength; i++)
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{
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#if defined( RAM_DRV_POLLING_INTERVAL )
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/* PRQA S 2985, 2991, 2995 1 */ /* MD_FblRamio_2985, MD_FblRamio_2991_2995, MD_FblRamio_2991_2995 */
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if (0u == (i & (RAM_DRV_POLLING_INTERVAL - 1u)))
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{
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RAM_DRV_POLLING_FUNCTION();
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}
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#endif /* RAM_DRV_POLLING_INTERVAL */
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readBuffer[i] = RAM_DRV_BUFFER[offset];
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offset++;
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}
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}
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return result;
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}
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#define FBLRAMIO_STOP_SEC_CODE
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#include "MemMap.h" /* PRQA S 5087 */ /* MD_MSR_MemMap */
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/* Module specific MISRA deviations:
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MD_FblRamio_0306:
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Reason: Address conversion between integer values and pointers is required to allow for hardware independent
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configuration and address range checks.
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Risk: The size of integer required to hold the result of a pointer cast is implementation defined.
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Prevention: The size of the respective integer data type which holds the address value is adapted on a hardware
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specific basis.
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MD_FblRamio_0310_3305:
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Reason: Pointer is casted as different memory access sizes are utilized due to performance reasons.
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Risk: Wrong pointer access is performed.
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Prevention: Code inspection and test of the different variants in the component test.
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MD_FblRamio_2985:
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Reason: Depending on configuration, RAM_DRV_POLLING_INTERVAL might be zero and thus
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i & (RAM_DRV_POLLING_INTERVAL - 1u) might be redundant.
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Risk: No identifiable risk.
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Prevention: No prevention required.
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MD_FblRamio_2991_2995:
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Reason: Depending on configuration, the controlling expression might always be true. This code structure maintains
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readbillity.
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Risk: No identifiable risk.
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Prevention: No prevention required.
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MD_FblRamio_2992_2996:
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Reason: Depending on configuration, the controlling expression might always be false. This code structure
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maintains readbillity.
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Risk: No identifiable risk.
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Prevention: No prevention required.
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*/
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/***********************************************************************************************************************
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* END OF FILE: FBL_RAMIO.C
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**********************************************************************************************************************/
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